it seems you have flashed a image with broken bootlogo... not correct format or anything like this.

To fix this you need a SD-Card labled "DREAMBOOT" with first partition in FAT format.

When you plug this the u-boot should stop before reading the bootlogo.... then the crash doesn't occur.

Then you can boot to normal image with "run boot_from_flash", or with "run recovery_from_flash" to start recovery mode.

You must fix the bootlogo or flash a image with correct one.

bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02

L0:e033003f
L1:00000703
L2:0000c067
L3:14000020
B2:00433060
B1:f0c021b0

TE: 605942

BL2 Built : 15:17:18, Feb 20 2019. g12b gb91a9c0 - jenkins@walle02Ysh

Board ID = 2
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 00094b8a
eMMC boot @ 0
sw8 s
sd/emmc cmd 8 arg 0x00000000 status 01ff3000
DDR driver_vesion: LPDDR4_PHY_V_0_1_11 build time: Feb 20 2019 15:17:14
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size:
0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size:
0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00068200, des: 0xfffd0000, size:
0x00004000, part: 0
PIEI prepare done
Cfg max: 4, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1200MHz
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size:
0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size:
0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

R0_RxClkDly_Margin==104 ps 8
R0_TxDqDly_Margi==156 ps 12


R1_RxClkDly_Margin==0 ps 0
R1_TxDqDly_Margi==0 ps 0

dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001

ddr scramble enable
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 0040002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass
pre test bdlr_100_average==496 bdlr_100_min==496 bdlr_100_max==496
bdlr_100_cur==496
aft test bdlr_100_average==496 bdlr_100_min==496 bdlr_100_max==496
bdlr_100_cur==496
100bdlr_step_size ps== 502
result report
boot times 0
non-sec scramble use zero key
ddr scramble enabled
Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size:
0x00004000, part: 0
Load BL3X from eMMC, src: 0x0006c200, des: 0x0175c000, size: 0x00128000, part: 0
0.0;0.0;M3 CHK:0;bl30 start
run into bl31
NOTICE: BL31: v1.3(release):bee21ef
NOTICE: BL31: Built : 16:42:55, Feb 21 2019
NOTICE: BL31: G12A secure boot!
INFO: BL3-2: ATOS-V2.4-202-g7b21f5e #1 Fri Dec 21 01:30:01 UTC 2018 arm
INFO: BL3-2: Chip: Unknown Rev: A (29:A - 40:2)
INFO: BL3-2: crypto engine DMA
INFO: BL3-2: secure time TEE
INFO: BL3-2: CONFIG_DEVICE_SECURE 0xb200000e


U-Boot 2015.01-g90d64dd5d3-dirty (Apr 23 2019 - 10:52:48)

DRAM: 2 GiB
Relocation Offset is: 76ef7000
spi_post_bind(spicc): req_seq = 0
spi_post_bind(spifc): req_seq = 1
register usb cfg[0][1] = 0000000077f8a4a8
MMC: dm one emmc init
.
aml_priv->desc_buf = 0x0000000073ee77b0
aml_priv->desc_buf = 0x0000000073ee9af0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x62000
[mmc_startup] mmc refix success
init_part() 297: PART_TYPE_AML
[mmc_init] mmc init success
skip dtb signature check
start dts,buffer=0000000073eec360,dt_addr=0000000073eec360
get_partition_from_dts() 71: ret 0
parts: 4
00: recovery 0000000004000000 1
01: boot 0000000002000000 1
set has_boot_slot = 0
02:dreambox-rootfs 0000000100000000 1
03:dreambox-data ffffffffffffffff 4
init_part() 297: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
crc32_s:0x7fd3b243 == storage crc_pattern:0x7fd3b243!!!
mmc env offset: 0x7400000
In: serial
Out: serial
Err: serial
reboot_mode=cold_boot
itest - return true/false on integer compare

Usage:
itest [.b, .w, .l, .s] [*]value1 <op> [*]value2
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-2755: calc 5299c5b4, store 5299c5b4
_verify_dtb_checksum()-2755: calc 5299c5b4, store 5299c5b4
dtb_read()-2972: total valid 2
update_old_dtb()-2953: do nothing
amlkey_init() enter!
[EFUSE_ERR]f(efuse_usr_api_init_dtb)L60:not find /efusekey node
[FDT_ERR_NOTFOUND].
[KM]Error:f[keymanage_efuse_init]L38:efuse init failed
[KM]Error:f[key_unify_init]L177:Device[1] init failed, err=39
vpu: clk_level in dts: 7
vpu: vpu_power_on
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: vpu_module_init_config
vpp: vpp_init
vpp: g12a/b osd1 matrix rgb2yuv ..............
vpp: g12a/b osd2 matrix rgb2yuv..............
vpp: g12a/b osd3 matrix rgb2yuv..............
cvbs: cpuid:0x29
tpm activate
01 01: 18
02 01: 00
03 04: 00 00 40 cb
06 08: 32 30 31 39 30 35 30 36
07 0f: 33 35 30 36 32 34 30 30 30 30 31 36 35 38 37
05 04: 01 01 01 01
08 01: 00
04 06: 00 09 34 4a de 5b
ff 01: 57
card out
** Bad device mmc 0 **
cannot get sdcard label
737 bytes read in 3 ms (239.3 KiB/s)
## Executing script at 01080000
922678 bytes read in 16 ms (55 MiB/s)
[OSD]load fb addr from dts:/meson-fb
[OSD]set initrd_high: 0x7f800000
[OSD]fb_addr for logo: 0x7f800000
[OSD]load fb addr from dts:/meson-fb
[OSD]fb_addr for logo: 0x7f800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x7f800000 width=2560, height=1440
[OSD]osd_hw.free_dst_data: 0,719,0,575
[OSD]osd1_update_disp_freescale_enable
[OSD]ERR: Error: Too much encoded pixel data, validate your bitmap
"Synchronous Abort" handler, esr 0x96000004
ELR: 77f21014
LR: 77f380c4
x0 : 0000000073be8420 x1 : 0000000073be8410
x2 : 9dbb333dd752988c x3 : 9dbb333e4b111c9c
x4 : 0000000077f8d000 x5 : 9dbb333dd752988c
x6 : 00000000ffffffc8 x7 : 0000000077f8d138
x8 : 00000000742f0420 x9 : 00000000d5be54e4
x10: ffffffffffffce00 x11: 0000000077f69080
x12: 0000000000000000 x13: 0000000068c0f261
x14: 000000003c6ef372 x15: 000000005f2477e1
x16: 00000000eb925c38 x17: 00000000a54ff53a
x18: 0000000073ee6e28 x19: 0000000000000500
x20: 000000007f0f7600 x21: 00000000000002d0
x22: 0000000073f6c420 x23: 0000000000384000
x24: 0000000000000010 x25: 0000000000000a00
x26: 0000000001080000 x27: 0000000000000008
x28: 0000000000000500 x29: 0000000073ee6290

Resetting CPU ...

resetting ...


THEN IT REBOOTS AGAIN, LOOPING....